ENTITY rf2_dec_nand4 IS
PORT (
  i0     : in  BIT;
  i1     : in  BIT;
  i2     : in  BIT;
  i3     : in  BIT;
  nq   	 : out BIT;
  vdd	 : in  BIT;
  vss	 : in  BIT
);
END rf2_dec_nand4;

ARCHITECTURE VBE OF rf2_dec_nand4 IS

BEGIN
  ASSERT (vdd and not (vss))
  REPORT "power supply is missing on rf2_dec_nand4"
  SEVERITY WARNING;

  nq <= not(i0 and i1 and i2 and i3);

END;